sm7745d series 4 pad 7 x 5mm leadless surface mount ceramic clock oscillato r cmos with enable/ disable, 3rd overtone crystal used low jitter 70.00 mhz ? 170.00 mhz standard specifications overall frequency stability sm7745d: 50 ppm, sm7744d: 25 ppm, sm7720d: 20 ppm over operating temp. range operating temperature range 0 to +70 c is standard, but can be extended to - 40 to +85 c for certain frequencies supply voltage (vcc) 5.0 volts, 3.3 volts and 2.5 volts available, .01 f bypass cap recommended symmetry (duty cycle) 40/60 to 60/40% is standard, but 45/55% at 50% of vcc is als o available (see waveform 1) output load standard load is 15pf maximum, see test circuit 2 (consult f actory for heavier loads) enable/disable option (e/d) supply current icc (ma) w/ 15pf load rise and fall time tr & tf (ns) w/ 15pf load frequency range (mhz) typical maximum typical maximum 70.000 ? 79.999 40.0 45.0 2.0 3.0 80.000 ? 110.000 75.0 80.0 0.5 1.0 110.001 ? 119.999 80.0 90.0 0.5 1.0 120.000 ? 170.000 90.0 95.0 0.5 1.0 part numbering guide model frequency stability 45 = 50 ppm 44 = 25 ppm frequency in mhz special specifications (choose all that apply) y: std specs (5.0v 10% , 0 to +70 c, 40/60% symmetry) e: extended operating temperature range (- 40 to +85 c) s: 45/55% symmetry at 50% of vcc v: supply voltage of 3.3 volts w: supply voltage of 2.5 volts sm77 45 d y -- 70.0m - 30 consult factory for available frequencies and specs. not all options available for all frequencies. a special part numbe r may be assigned. mechanical: not to scale inches (mm) max 0.01 f m .276 (7.0 .2) 1 2 3 4 feb 2002 .075 (1.9) .197 (5.0 .2) vcc e/d gnd out 1 2 3 4 .08 (2.0) .07 (1.8) .200 (5.08) solder pads 19013 36th ave. west suite h lynnwood, wa 98036, usa 10% 5% bypass capacitor consult factory for higher frequencies ple .09 (2.2) (425) 776 - 1880, fax: (425) 776 - 2760, ple - sales@pletronics.com, www.pletronics.com 6 pl tronics, inc. packaging tray or 16mm tape 8mm pitch frequency stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration a nd load output enabled when pin #1 is open or at logic ? 1 ? ; output disabled when pin #1 is at logic ? 0 ? . due to part size and factory abilities, part marking may var y from lot to lot and may contain our part number or an inte rnal code. non-std output load blank = 15 pf max, 30 = 30 pf max, 50 = 50 pf max 1 ps rms maximum, from 12 khz to 20 mhz from carrier jitter logic levels logic ? 1 ? 90% of vcc min; logic ? 0 ? 10% of vcc max 20 = 20 ppm .130 (3.3)
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